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ULSI Semiconductor Technology Atlas
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ULSI Semiconductor Technology Atlas Hardcover - 2003 - 1st Edition

by Chih-Hang Tung; George T. Sheng; Chih-Yuan Lu


From the publisher

More than 1,100 TEM images illustrate the science of ULSI

The natural outgrowth of VLSI (Very Large Scale Integration), Ultra Large Scale Integration (ULSI) refers to semiconductor chips with more than 10 million devices per chip. Written by three renowned pioneers in their field, ULSI Semiconductor Technology Atlas uses examples and TEM (Transmission Electron Microscopy) micrographs to explain and illustrate ULSI process technologies and their associated problems.

The first book available on the subject to be illustrated using TEM images, ULSI Semiconductor Technology Atlas is logically divided into four parts:
* Part I includes basic introductions to the ULSI process, device construction analysis, and TEM sample preparation
* Part II focuses on key ULSI modules--ion implantation and defects, dielectrics and isolation structures, silicides/salicides, and metallization
* Part III examines integrated devices, including complete planar DRAM, stacked cell DRAM, and trench cell DRAM, as well as SRAM as examples for process integration and development
* Part IV emphasizes special applications, including TEM in advanced failure analysis, TEM in advanced packaging development and UBM (Under Bump Metallization) studies, and high-resolution TEM in microelectronics


This innovative guide also provides engineers and managers in the microelectronics industry, as well as graduate students, with:
* More than 1,100 TEM images to illustrate the science of ULSI
* A historical introduction to the technology as well as coverage of the evolution of basic ULSI process problems and issues
* Discussion of TEM in other advanced microelectronics devices and materials, such as flash memories, SOI, SiGe devices, MEMS, and CD-ROMs

First line

The first transistor was invented by John Bardeen, Walter Brattain, and William Shockley on December 16, 1947, at Bell Labs (Early 2001.)

From the rear cover

More than 1,100 TEM images illustrate the science of ULSI

The natural outgrowth of VLSI (Very Large Scale Integration), Ultra Large Scale Integration (ULSI) refers to semiconductor chips with more than 10 million devices per chip. Written by three renowned pioneers in their field, ULSI Semiconductor Technology Atlas uses examples and TEM (Transmission Electron Microscopy) micrographs to explain and illustrate ULSI process technologies and their associated problems.

The first book available on the subject to be illustrated using TEM images, ULSI Semiconductor Technology Atlas is logically divided into four parts:

  • Part I includes basic introductions to the ULSI process, device construction analysis, and TEM sample preparation
  • Part II focuses on key ULSI modules--ion implantation and defects, dielectrics and isolation structures, silicides/salicides, and metallization
  • Part III examines integrated devices, including complete planar DRAM, stacked cell DRAM, and trench cell DRAM, as well as SRAM as examples for process integration and development
  • Part IV emphasizes special applications, including TEM in advanced failure analysis, TEM in advanced packaging development and UBM (Under Bump Metallization) studies, and high-resolution TEM in microelectronics

This innovative guide also provides engineers and managers in the microelectronics industry, as well as graduate students, with:

  • More than 1,100 TEM images to illustrate the science of ULSI
  • A historical introduction to the technology as well as coverage of the evolution of basic ULSI process problems and issues
  • Discussion of TEM in other advanced microelectronics devices and materials, such as flash memories, SOI, SiGe devices, MEMS, and CD-ROMs

Details

  • Title ULSI Semiconductor Technology Atlas
  • Author Chih-Hang Tung; George T. Sheng; Chih-Yuan Lu
  • Binding Hardcover
  • Edition number 1st
  • Edition 1
  • Pages 680
  • Volumes 1
  • Language ENG
  • Publisher Wiley-Interscience, Hoboken, New Jersey
  • Date 2003-10-06
  • Illustrated Yes
  • ISBN 9780471457725 / 0471457728
  • Weight 3.05 lbs (1.38 kg)
  • Dimensions 10.24 x 7.16 x 1.44 in (26.01 x 18.19 x 3.66 cm)
  • Library of Congress subjects Electron microscopy, Integrated circuits - Ultra large scale
  • Library of Congress Catalog Number 2003049661
  • Dewey Decimal Code 621.395

About the author

CHIH-HANG TUNG is a senior member of the technical staff and Project Leader at the Institute of Microelectronics in Singapore.

GEORGE T. T. SHENG was the first to develop cross-sectioning samples of TEM studies of semiconductor devices and has been involved with many other groundbreaking projects at Bell Labs.

CHIH-YUAN LU is Chairman and CEO of Ardentec Corp., an ULSI testing service company. He is also CTO of Macronix International Co., Ltd., the eighth largest worldwide NVM semiconductor company.

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