BIBLIO is the largest independent book marketplace in the world, with over 100 million books.

Skip to content

High-Performance Computing on the Intel® Xeon Phi?: How to Fully Exploit MIC Architectures

High-Performance Computing on the Intel® Xeon Phi?: How to Fully Exploit MIC Architectures

High-Performance Computing on the Intel® Xeon Phi?: How to Fully Exploit MIC
Stock photo: cover may vary

High-Performance Computing on the Intel® Xeon Phi?: How to Fully Exploit MIC Architectures Hardback - 2014

by Wang, Endong

Add to wish list
  • Used
  • Good
  • Hardback
Used - Good

Description

hardcover. Good. Access codes and supplements are not guaranteed with used items. May be an ex-library book.
Ask the seller a question Add to wish list
A$129.10
Free Delivery within USA
Standard delivery: 7 to 14 days
More delivery options
Dropship order
Ships from Bonita (California, United States)

Details

  • Title High-Performance Computing on the Intel® Xeon Phi?: How to Fully Exploit MIC Architectures
  • Author Wang, Endong
  • Binding Hardback
  • Condition Used - Good
  • Pages 338
  • Volumes 1
  • Language ENG
  • Publisher Springer, U.S.A.
  • Publication date 2014-07-11
  • Illustrated Yes
  • Features Illustrated
  • Bookseller's Inventory # 3319064851.G
  • ISBN 9783319064857 / 3319064851
  • Weight 1.51 lbs (0.68 kg)
  • Dimensions 9.21 x 6.14 x 0.81 in (23.39 x 15.60 x 2.06 cm)
  • Themes
    • Aspects (Academic): Science/Technology Aspects
  • Category Computers - General Information
  • Dewey Decimal Code 004
  • Quantity available 1

About Bonita California, United States

Biblio member since 2020

Terms of Sale: 30 day return guarantee, with full refund including original shipping costs for up to 30 days after delivery if an item arrives misdescribed or damaged.

Browse books from Bonita

Reader reviews for High-Performance Computing on the Intel® Xeon Phi?: How to Fully Exploit MIC Architectures

From the publisher

The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel(R) Xeon Phi(TM) series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms and also offers tips and tricks for actual use, based on the authors' first-hand optimization experience.

The material is organized in three sections. The first section, "Basics of MIC", introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on "Performance Optimization" explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, "Project development" presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC.

This book appeals to two main audiences: First, software developers for HPC applications - it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually required in biological genetics, medical imaging, aerospace, meteorology and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing - it will guide them on how to push the limits of system performance for HPC applications.

From the rear cover

The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel(R) Xeon Phi(TM) series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms, and also offers tips and tricks for actual use, based on the authors' first-hand optimization experience.

The material is organized in three sections. The first section, "Basics of MIC", introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on "Performance Optimization" explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, "Project development" presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC.

This book appeals to two main audiences: First, software developers for HPC applications - it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually required in biological genetics, medical imaging, aerospace, meteorology, and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing - it will guide them on how to push the limits of system performance for HPC applications.

About the author

Endong Wang is the Director of the State Key Laboratory of High-Efficiency Server and Storage Technology at the Inspur-Intel China Parallel Computing Joint Lab and Senior Vice President of the Inspur Group Co., Ltd. Qing Zhang is the lead engineer of the Inspur-Intel China Parallel Computing Joint Lab and with his team he was among the first to work with the development environment of the Intel(R) Xeon processor and Intel(R) Xeon Phi(TM) coprocessor. Together they have several years of experience in HPC programming.
tracking-