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Resource Efficient LDPC Decoders: From Algorithms to Hardware Architectures

Resource Efficient LDPC Decoders: From Algorithms to Hardware Architectures

Resource Efficient LDPC Decoders: From Algorithms to Hardware Architectures Paperback / softback - 2017

by Vikram Arkalgud Chandrasetty

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Paperback / softback. New. This book takes a practical hands-on approach to developing low complexity algorithms and transforming them into working hardware. It follows a complete design approach - from algorithms to hardware architectures - and addresses some of the challenges associated with their design, providing insight into implementing innovative architectures based on low complexity algorithms. The reader will learn: Modern techniques to design, model and analyze low complexity LDPC algorithms as well as their hardware implementation How to reduce computational complexity and power consumption using computer aided design techniques All aspects of the design spectrum from algorithms to hardware implementation and performance trade-offs
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Details

  • Title Resource Efficient LDPC Decoders: From Algorithms to Hardware Architectures
  • Author Vikram Arkalgud Chandrasetty
  • Binding Paperback
  • Condition New
  • Pages 190
  • Volumes 1
  • Language ENG
  • Publisher Academic Press
  • Publication date 2017
  • Illustrated Yes
  • Features Bibliography, Illustrated, Index
  • Bookseller's Inventory # A9780128112557
  • ISBN 9780128112557 / 0128112557
  • Category Technology & Industrial Arts
  • Library of Congress subjects Digital communications, Decoders (Electronics)
  • Library of Congress Catalogue Number 2017962394
  • Quantity available 10

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Reader reviews for Resource Efficient LDPC Decoders: From Algorithms to Hardware Architectures

From the publisher

This book takes a practical hands-on approach to developing low complexity algorithms and transforming them into working hardware. It follows a complete design approach - from algorithms to hardware architectures - and addresses some of the challenges associated with their design, providing insight into implementing innovative architectures based on low complexity algorithms.
The reader will learn:

  • Modern techniques to design, model and analyze low complexity LDPC algorithms as well as their hardware implementation
  • How to reduce computational complexity and power consumption using computer aided design techniques
  • All aspects of the design spectrum from algorithms to hardware implementation and performance trade-offs
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