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SYSTEMVERILOG FOR VERIFICATION: A GUIDE TO LEARNING THE TESTBENCH LANGUAGE FEATURES

SYSTEMVERILOG FOR VERIFICATION: A GUIDE TO LEARNING THE TESTBENCH LANGUAGE FEATURES

SYSTEMVERILOG FOR VERIFICATION: A GUIDE TO LEARNING THE TESTBENCH LANGUAGE
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SYSTEMVERILOG FOR VERIFICATION: A GUIDE TO LEARNING THE TESTBENCH LANGUAGE FEATURES Hardback - 2007

by CHRIS SPEAR ,

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Springer, 2007. 1st. Hardcover. New/New.
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Details

  • Title SYSTEMVERILOG FOR VERIFICATION: A GUIDE TO LEARNING THE TESTBENCH LANGUAGE FEATURES
  • Author CHRIS SPEAR ,
  • Binding Hardback
  • Edition 1st
  • Condition New
  • Pages 301
  • Volumes 1
  • Language ENG
  • Publisher Springer
  • Publication date 2007
  • Illustrated Yes
  • Bookseller's Inventory # AME_9780387270364
  • ISBN 9780387270364 / 0387270361
  • Weight 1.52 lbs (0.69 kg)
  • Dimensions 9.36 x 6.49 x 0.9 in (23.77 x 16.48 x 2.29 cm)
  • Category Technology & Industrial Arts
  • Library of Congress subjects Verilog (Computer hardware description, Integrated circuits - Verification
  • Library of Congress Catalogue Number 2006926262
  • Dewey Decimal Code 621.392
  • Quantity available 5

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Reader reviews for SYSTEMVERILOG FOR VERIFICATION: A GUIDE TO LEARNING THE TESTBENCH LANGUAGE FEATURES

From the publisher

SystemVerilog for Verification provides practical information for hardware and software engineers using the SystemVerilog language to verify electronic designs. The authors explain methodology concepts for constructing testbenches that are modular and reusable. This book includes extensive coverage of the SystemVerilog 3.1a constructs such as classes, program blocks, randomization, assertions, and functional coverage. It also reviews SystemVerilog 3.0 topics such as interfaces and data types. For hardware engineers, this book has several chapters with detailed explanations of Object Oriented Programming based on years of teaching OOP to hundreds of students. For software engineers, there is a wealth of information on testbenches, multithreaded code, and interfacing to hardware designs. The reader only needs to know the Verilog 1995 standard.
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