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Prentice Hall, 0000-00-00. hardcover. Used: Good.
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Design-For-Test for Digital IC's and Embedded Core Systems Hardcover - 1999
by Alfred Crouch
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- Title Design-For-Test for Digital IC's and Embedded Core Systems
- Author Alfred Crouch
- Binding Hardcover
- Edition 1st edition
- Pages 347
- Volumes 1
- Language ENG
- Publisher Prentice Hall, Upper Saddle River, N.J.
- Date June 15, 1999
- Illustrated Yes
- ISBN 9780130848277 / 0130848271
- Weight 1.33 lbs (0.60 kg)
- Dimensions 9.18 x 6.98 x 0.85 in (23.32 x 17.73 x 2.16 cm)
- Library of Congress subjects Electronic circuit design, Digital integrated circuits - Design and
- Library of Congress Catalog Number 99-23871
- Dewey Decimal Code 621
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Design-For-Test for Digital Ic's & Embedded Core Systems
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Design-For-Test for Digital Ic's & Embedded Core Systems
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Design-For-Test for Digital Ic's & Embedded Core Systems
by Crouch, Alfred L.
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Design-For-Test for Digital Ic's & Embedded Core Systems
by Crouch, Alfred L
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- 9780130848277 / 0130848271
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Prentice Hall, 0000-00-00. hardcover. Used:Good.
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Design-For-Test For Digital IC's and Embedded Core Systems
by Crouch, Alfred
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Upper Saddle River, N.J.: Prentice Hall, 1999. Comprehensive text introduces the basic concepts of test and design-for-test (DFT), and addresses the application of these concepts with an eye toward the trade-offs of the engineering budgets (area, frequency, power, etc.), the business drivers, and the cost drivers. This practical guide on the test and Design-for-test topics has been developed along the lines of a just what you need to know and how to do it guide that explains the topic, the trade-offs, and relates the topic to the design flow. Key topics include: Core-based design, focusing on embedded cores and embedded memories. System-on-a-chip and ultra-large scale integrated design issues. AC scan, at-speed scan, and embedded DFT. Built-in self-test, including memory BIST, logic BIST, and…
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